Unless otherwise indicated, the foregoing is not admitted to be prior art to the claims recited herein and should not be construed as such.
With the integration of high resolution cameras into mobile devices such as smart phones and computing tablets, high current (e.g., >1A) flash LEDs are typically required for high pixel (e.g., >5M pixel) cameras. Thus, the power dissipation in power management ICs (PMICs) that include flash LED drivers is elevated. Since the flash LED driver is one of the higher power consumption modules in a PMIC, minimizing the power dissipation from the flash LED driver is an important consideration in a PMIC design to extend battery life and reduce thermal risks.
Typically, a flash LED driver includes an output stage and a current regulator that regulates the output current of the output stage. The current regulator may include an error amplifier that is connected to the output stage in a feedback loop.
Power dissipation can be reduced by reducing the headroom voltage of the flash LED driver. Headroom voltage refers to the voltage drop between the driver's voltage supply and the output voltage of the driver. However, when the headroom voltage is decreased, the feedback loop tends to drive the output stage into the linear region, thus reducing the system loop gain. Conversely, when the headroom voltage is increased, the output stage is driven into the saturation region with much larger gain (e.g., 50-60 dB or higher), which reduces phase margin and thus system stability.
Further exacerbating the problem is that conventional PMIC designs cannot anticipate what devices (smart phones, computer tablets, portable cameras, etc.) the PMICs will be used in, and how such devices will be used by the end user. Accordingly, a given PMIC can be exposed to a wide range of headroom voltage conditions and load conditions and so its design is not likely to be adequate for all use cases.